Interesting (but understandable pre-silicon) to see a couple of errors about the 6502 in that e.g. SBC needs SEC before it not CLC. The code examples could be improved too e.g. the 6502 memory copy has no need to use both index registers and increment them in lockstep with the same values. And better still, since you're copying fewer than 256 bytes, initialize one index register to COUNT-1 and copy from last to first.

On the other hand the 6800 code is buggy too. It's incrementing only one byte of the FROM and TO pointers — and the MSB at that on a bigendian machine — with no provision for crossing a page boundary, when the normal thing is to

    LDX FROM
    LDA 0,X
    INX
    STX FROM
    LDX TO
    STA 0,X
    INX
    STX TO

Still, as they say, much messier than 6502's...

    LDA FROM,X
    STA TO,X
    INX

... even if the 6502 needs an outer loop to copy more than 256 bytes, at least the inner loop is fast.

Also no mention is made of `(ZP),Y` addressing mode which takes 6502 to another level entirely.