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Are you sure you actually know what you're talking about?

FPGA unit costs keep doing down and they usually tend to use a recent manufacturing process. Meanwhile the fixed NRE costs of ASICs keep going up the more advanced the manufacturing process is.

An FPGA consists of non programmable logic components such as DSPs, block RAM, NoCs, SERDES/configurable IO, that keep scaling with the manufacturing process.

If you try to replicate this with an older process to cut costs, you will have an area and energy efficiency penalty.

This means that FPGAs have become more relevant over time.



I'm not sure it's quite as clean cut as you say. FPGA's have a 10x penalty in area due to the extra routing wires they need.

Also, it seems like the node that Xilinx has been using lately (28 nm) isn't as cutting edge as it used to be.




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