The one argument I can make is that MIPS is too simple. But I would only make this claim on the simplest of in-order single or dual issue implementations. Think of a memcpy loop: 32-bit ARM and PowerPC can update the pointers as a side effect of the load and store instructions, but MIPS can not. You could make similar arguments in favour of ARM's thumb instruction set (more work done per 32-bits of instruction loaded with low decoding overhead vs. x86).

For implementations more advanced than this... I don't think you can make any such claim based on ISA. x86 may be at a slight disadvantage due to decoding, but that's about it.