So ARMv7 you mean? This is CPU hardware level memory model dependant. Not absolutely sure, didn't look that hard, but I think this doesn't implement ARMv7 memory model correctly, so maybe it doesn't always function right. It might be possible for a message to be committed, but some cache lines containing message bytes still dirty.
This implementation is using sun.misc.unsafe afterall.
Different ARM CPUs implement different memory models. So what applies to one ARM design might not apply to another. ARMv8 is probably easiest to support due to new instructions, load-acquire and store-release.
Again, not sure without further analysis. And no time to do it.
This implementation is using sun.misc.unsafe afterall.
Different ARM CPUs implement different memory models. So what applies to one ARM design might not apply to another. ARMv8 is probably easiest to support due to new instructions, load-acquire and store-release.
Again, not sure without further analysis. And no time to do it.